Question 14: Semiconductors and Logic Gates

Question

$$ 	ext { For the given logic gate circuit, which of the following is the correct truth table? } $$

Accepted Answer

The gate I is OR Gate. It receives inputs n and m . Its output is $\mathrm{Y}_1=\mathrm{n}+\mathrm{m}$.
Gate II is NAND Gate. It receives two inputs, the original input n and the output of the OR gate $\left(\mathrm{Y}_1ight)$. Its output z is the result of an AND operation followed by a NOT operation, $\mathrm{z}=\overline{\mathrm{n} \cdot(\mathrm{n}+\mathrm{m})}$.
Using Boolean algebra laws :
$$ \mathrm{z}=\overline{\mathrm{n} \cdot(\mathrm{n}+\mathrm{m})} $$
$$\Rightarrow $$ $$ \mathrm{z}=\overline{(\mathrm{n} \cdot \mathrm{n})+(\mathrm{n} \cdot \mathrm{~m})} $$
Since $\mathrm{n} \cdot \mathrm{n}=\mathrm{n}$, the expression simplifies to $\mathrm{z}=\overline{\mathrm{n}+(\mathrm{n} \cdot \mathrm{m})}=\overline{\mathrm{n}}$
Truth table,
n
m
Y
1
= n + m
NAND Input
z =
n ÃÂ· Y
1
n
Y
1
0
0
0
0
0
1
0
1
1
0
1
1
1
1
1
1
1
0
1
0
1
1
1
0
The output z is purely the inverse of input n . When $\mathrm{n}=0, \mathrm{z}=1$. When $\mathrm{n}=1, \mathrm{z}=0$.
$$ \begin{array}{c|c|c} n & m & z \ \hline 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 \end{array} $$
Therefore, the correct option is (A).

Answer

$$ \begin{array}{c|c|c} n & m & z \ \hline 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 \end{array} $$

Answer

$$ \begin{array}{c|c|c} n & m & z \ \hline 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 0 & 0 \end{array} $$

Answer

$$ \begin{array}{c|c|c} n & m & z \ \hline 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 1 \end{array} $$

Answer

$$ \begin{array}{c|c|c} n & m & z \ \hline 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 0 \ 1 & 0 & 0 \end{array} $$

Semiconductors and Logic Gates

\text { For the given logic gate circuit, which of the following is the correct truth table? }

Choose the correct answer: