Question 16: Semiconductors and Logic Gates

Question

The correct truth table for the given input data of the following logic gate is :
![](https://app-content.cdn.examgoal.net/fly/@width/image/6y3zli1ml8tyqx1/3687725b-21a8-4a74-ab84-16bcb285a300/66ccdf50-0239-11f1-88dd-c7214e4b90e3/file-6y3zli1ml8tyqx2.png?format=png)

Accepted Answer

The given logic gate is, $\$
Gate 1 is an AND gate for the inputs A and $\mathrm{B}, \Rightarrow \mathrm{Y}_1=\mathrm{A} \cdot \mathrm{B}$ $\$
$ \begin{array}{c|c|c} A & B & {Y}_1 \ \hline 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 0 \ 1 & 1 & 1 \end{array} $ $\$
Gate 2 is an OR gate for the inputs C and $\mathrm{D}, $\$
\Rightarrow \mathrm{Y}_2=\mathrm{C}+\mathrm{D}$ $\$
$ \begin{array}{c|c|c} C & D & {Y}_2 \ \hline 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 1 \end{array} $ $\$
Gate 3 is a NOT gate for which the input is $Y_1$ (the output of gate 1), $\$
$Y_3=\overline{Y_1}$ $\$
$ \begin{array}{c|c} {Y}_1 & {Y}_3 \ \hline 0 & 1 \ 0 & 1 \ 0 & 1 \ 1 & 0 \end{array} $ $\$
Gate 4 is an AND gate for inputs $Y_2$ and $Y_3, $\$
Y_4=Y_3 \cdot Y_2$ $\$
$ \begin{array}{c|c|c} {Y}_2 & {Y}_3 & {Y}_4 \ \hline 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 1 & 1 \ 1 & 0 & 0 \end{array} $ $\$
Gate 5 is a NOT gate which inverts the output of Gate 4 to give the final output, $\$
$Y=\overline{\mathrm{Y}_4}$ $\$
$ \begin{array}{c|c} {Y}_4 & {Y} \ \hline 0 & 1 \ 1 & 0 \ 1 & 0 \ 0 & 1 \end{array} $ $\$
So, the final truth table is, $\$
$ \begin{array}{c|c|c|c|c} A & B & C & D & 	ext {Output Y} \ 
\hline 1 & 1 & 0 & 1 & 1 \ 0 & 0 & 1 & 1 & 0 \ 1 & 0 & 1 & 0 & 0 \ 1 & 1 & 1 & 1 & 1 \end{array} $ $\$
Hence, the correct option is (A).
![](https://app-content.cdn.examgoal.net/fly/@width/image/6y3zli1mlxig2y6/8e9f0f5e-e991-409b-9b5d-63579da6f278/f38910e0-0fcb-11f1-a394-37c86c2244c4/file-6y3zli1mlxig2y7.png?format=png)

Answer

$ \begin{array}{c|c|c|c|c} A & B & C & D & Y \ 
\hline 1 & 1 & 0 & 1 & 1 \ 0 & 0 & 1 & 1 & 0 \ 1 & 0 & 1 & 0 & 0 \ 1 & 1 & 1 & 1 & 1 \end{array} $

Answer

$ \begin{array}{c|c|c|c|c} A & B & C & D & Y \ 
\hline 1 & 1 & 0 & 1 & 0 \ 0 & 0 & 1 & 1 & 1 \ 1 & 0 & 1 & 0 & 1 \ 1 & 1 & 1 & 1 & 1 \end{array} $

Answer

$ \begin{array}{c|c|c|c|c} A & B & C & D & Y \ 
\hline 1 & 1 & 0 & 1 & 1 \ 0 & 0 & 1 & 1 & 0 \ 1 & 0 & 1 & 0 & 1 \ 1 & 1 & 1 & 1 & 0 \end{array} $

Answer

$ \begin{array}{c|c|c|c|c} A & B & C & D & Y \ 
\hline 1 & 1 & 0 & 1 & 0 \ 0 & 0 & 1 & 1 & 0 \ 1 & 0 & 1 & 0 & 1 \ 1 & 1 & 1 & 1 & 1 \end{array} $

Semiconductors and Logic Gates

The correct truth table for the given input data of the following logic gate is :

Choose the correct answer: